1. Field
The present disclosure pertains to the field of power management. More particularly, the present disclosure pertains to a new method, system and apparatus for efficiently switching between multiple power states for an integrated device.
2. Description of Related Art
Power management schemes allow for reducing power consumption for various types of and systems and integrated devices, such as, servers, laptops, processors and desktops. Typically, software methods are employed for systems and integrated devices to support multiple power states for optimizing performance based at least in part on the Central Processing Unit (CPU) activity.
However, the present software methods for supporting multiple power states have a significant time penalty (overhead) for switching between the power states. For example, the time penalty may approach several million-clock cycles. Furthermore, the present sample rates of the processor are limited due to the overhead associated with the software methods. Typically, the sample rate is 10 ms. Furthermore, there is only limited information on the processor's state that is available, such as, whether the processor is idle or active.